ABSTRACT
The looming transistor scaling limits have driven the semiconductor industry to advance packaging in order to stay in line with Moore’s law. This has increased complexity and reduced interconnect (IC) dimensions of advanced package technologies, which significantly challenged the nondestructive characterization of defects with 2D X-ray imaging techniques, due mostly to the increasing superposition of images from interfering features along the X-ray beam direction in the field of view made worse with the lower image contrast because of the reduced dimension of defects. For instance, a significant number of defects in package failure mechanisms, such as fatigue, cracking, and nonwetting in solder joints at the first-, middle-, and second-level IC, copper migration, and trace cracking are of dimensions typically <1 micron. The TSV is one of the key enabling technologies for 3D stacking of multichips and presents substantial metrology and inspection challenges because of the high aspect ratio, large feature sizes, and opaqueness to light of the copper [1].
