ABSTRACT
Nonvolatile memorie (NVM) technology, device, and product reliability are subjects by themselves and are tied with silicon based FET technology and product reliability. At present, NVM products and associated devices are primarily of floating-gate (FG) NAND, flash and NOR flash, and charge-trapping (CT) SONOS NROM flash types. These products and devices had been successfully scaled over the past three decades along with the technology node scaling of silicon microelectronics. The significance of stress-induced extrinsic defects and related traps and the intrinsic defects and associated traps in tunnel oxide affecting NVM reliability is elaborated here. Conventional NVM devices had employed oxide films, interfacing the silicon substrate as the primary tunneling medium for electrons and holes to be injected from silicon, transported through the oxide and to be stored either in the floating silicon gate or in the discrete traps of nitride for the FG and CT devices, respectively.
