After presenting diﬀerent solutions proposed to design and implement dynamic reconﬁgurable systems, this chapter will describe a general and complete design methodology that can be followed as a guideline for designing reconﬁgurable embedded systems. The proposed workﬂow aims at designing a complete framework able to support diﬀerent devices (i.e., [102, 101]), multi-FPGA architecture (i.e., the RAPTOR2000 system ), diﬀerent reconﬁguration techniques ([95, 98]) and type of reconﬁguration (i.e., internal or external, mono and bi-dimensional) that allow a simple implementation of an FPGA system speciﬁcation, exploiting the capabilities of partial dynamic reconﬁguration. The idea behind the proposed methodology is based on the assumption that it is desirable to implement a ﬂow that can output a set of conﬁguration bitstreams used to conﬁgure and, if necessary, partially reconﬁgure a standard FPGA to realize the desired system. One of the main strengths of the proposed methodology is its low-level architectural independence. This chapter can be seen as a bridge between Chapters 3 and 4 and Chapter 7.