ABSTRACT
After presenting different solutions proposed to design and implement dynamic reconfigurable systems, this chapter will describe a general and complete design methodology that can be followed as a guideline for designing reconfigurable embedded systems. The proposed workflow aims at designing a complete framework able to support different devices (i.e., [102, 101]), multi-FPGA architecture (i.e., the RAPTOR2000 system [109]), different reconfiguration techniques ([95, 98]) and type of reconfiguration (i.e., internal or external, mono and bi-dimensional) that allow a simple implementation of an FPGA system specification, exploiting the capabilities of partial dynamic reconfiguration. The idea behind the proposed methodology is based on the assumption that it is desirable to implement a flow that can output a set of configuration bitstreams used to configure and, if necessary, partially reconfigure a standard FPGA to realize the desired system. One of the main strengths of the proposed methodology is its low-level architectural independence. This chapter can be seen as a bridge between Chapters 3 and 4 and Chapter 7.
