ABSTRACT
Like many other products, electronic integrated circuits are often being tested for quality assurance. These tests can be performed at different levels during manufacturing and system integration. With current semiconductor technologies, tests can be conducted at the wafer, chip, package, board and system levels, using suitable test technologies. To ensure that electronic integrated circuits and systems are testable, it is very important to make sure that circuits are testable during the design processes-hence, the terms of testability and design-for-test (DFT). Testability is a relative measure of the effort (or cost) of testing integrated circuits. It
reflects the estimated effort to control and observe internal signals via primary inputs and outputs. Integrated circuits with good testability often result in reduced test cost and improved quality. Testability analysis is often performed at different stages during design processes, making sure that defined testability objectives are satisfied. DFT is a design practice that ensures the testability in circuit and system designs, by
inserting circuit structures facilitating access to internal signals during tests. To reduce design cycles, DFTmust be considered and incorporated from the very beginning of design processes while circuits and systems are being architecturally specified. DFT practiced as late-stage add-on features would lengthen design cycle times and may incur additional design iterations.
