ABSTRACT
Gate-level modeling is an intuitive approach to digital design because it corresponds one-to-one with conventional digital logic design at the gate level. Dataflow modeling, however, is at a higher level of abstraction than gate-level modeling. Design automation tools are used to create gate-level logic from dataflow modeling by a process called logic synthesis. Register transfer level (RTL) is a combination of dataflow modeling and behavioral modeling and characterizes the flow of data through logic circuits.
