H half-adder Forms the basis of multi-digit addition or subtraction of base-2 numbers. It is the smallest operational block that performs elementary binary addition or subtraction on a single digit. The half-adder has two inputs X and Y for the addend and augend. Normally a combinational circuit, it provides sum, S, and carry, C, outputs based on the immediate input conditions. The operation of the half-adder is defined by
S = (X ⊗ Y )⊕ (X ⊗ Y ) ≡ (X ⊕ Y )⊕ (X ⊗ Y )
C = X ⊗ Y , and is illustrated in the accompanying truth table.