ABSTRACT
A SoC is composed of many hardware and software components embedded on a single chip. In particular, SoC verification is one of the largest consumers of design time and effort. This chapter introduces SoC modeling and discusses different abstraction levels. It focuses on user-driven top-down and bottom-up SoC refinement based on orthogonalization of concerns, i.e. separation of specification from architecture implementation, and module behavior from communication interface. The chapter examines past and existing commercial and prototype system-level design tools and environments for Multicore design. Through successive functional decomposition and communication refinement, advanced system-level SoC modeling leads from a high-level model derived from initial specifications to Layering simplifies individual component design by defining functional entities at various abstraction levels and implementing protocols to perform each entity's task. High-level System C-based modeling involves hardware objects, as well as system and application software components.
