ABSTRACT
This chapter describes the aspect of configuration and reconfiguration of communication resources at the on-chip level in the field of configurable resources (FCR) interfacing the on-chip communication network to the system level of reconfigurable computing systems (RCS). In contrast to conventional computing systems, RCS architecture allows configuration and reconfiguration of the topology of communication links between the functional components—processing elements. This allows static and dynamic adaptation of the RCS architecture to the task algorithm and data structure as well as performance constraints. The necessity for different power supplies for the on-chip circuitry and on-board communication network is dictated by different power requirements for circuit operation inside the chip and signal transfer between the chips on long distances on the printed circuit board. The input buffers connected to communication lines are working as radio frequency receivers. The designers are trying to deploy communication and switching elements at the on-chip level of the FCR as much as possible.
