ABSTRACT
The Butterfly parallel processor by Bolt, Beranek, and Newman, Inc., is composed of processors with memory and a novel high-performance switch interconnecting the processors. Communications and networking applications developed at BBN for the Butterfly use the cooperating sequential processes approach. The Butterfly switch uses techniques similar to packet switching to implement high-performance interprocessor communication. Memory in the Butterfly system is accessed through a segmented virtual memory management system. The Uniform System uses an alternative approach, which is to share a single large block of memory by mapping the block into the address space of each process. The Butterfly hardware and Chrysalis Operating System comprise a foundation on which to build a variety of software structures. The principal difference is that the processes actually run concurrently on the multiple processors of the Butterfly parallel processor, whereas the processes must run in an interleaved fashion on a uniprocessor.
