ABSTRACT
The programming complexity of the high-end PICs is also much greater than their mid-range counterparts because their instruction set has double the number of instructions and the assembly language itself is more difficult to learn and follow. In most cases the difference between a baseline and mid-range device is that the low-end one lacks some features or has less program space or storage. One of the consequences of the PIC’s Harvard architecture is that the instructions can be wider than the 8-bit data size. In the mid-range PICs each instruction is 14-bits wide and every fetch operation brings into the execution unit one complete operation code. Mid-range PICs require an external device to produce the clock cycles required for its operation. The PIC executes an instruction every four clock cycles, so the oscillator speed determines the device performance. All PICs of the mid-range family to some degree support interrupts.
