ABSTRACT
This chapter discusses the design, operation, and layout of CMOS analog amplifiers and subcircuits (current mirrors, biasing circuits, etc.). To make this discussion meaningful and clear, we need to define some important variables related to the DC operation of MOSFETs (Fig. 19.1). Figure 19.1(a) shows the simplified schematic representations of n-and p-channel MOSFETs. We say simplified because, when these symbols are used, it is
assumed
that the fourth terminal of the MOSFET (i.e., the body connection) is connected to either the lowest potential on the chip (
V
or ground for the NMOS) or the highest potential (
V
for the PMOS). Figure 19.1(b) shows the more general schematic representation of n-and p-channel MOSFETs. We are assuming that, although the drain and source of the MOSFETs are interchangeable, drain current flows from the top of the device to the bottom. Because of the assumed direction of current flow, the drain terminal of the n-channel is on the top of the symbol, while the drain terminal of the p-channel is on the bottom of the schematic symbol. The following are short descriptions of some important characteristics of MOSFETs that will be useful in the following discussion.
