ABSTRACT
It is often called the cell-library design approach, but it is also called the polycell or standard-cell design approach in order to avoid confusion with the words “cell” and “library” from those which are used in the gate arrays. The height of all cells are chosen the same, even though area is wasted inside a cell, such that many cells are connected into rows, as exemplified in Fig. 45.1, which shows an example with three rows of cells.
