ABSTRACT
In past decades, owing to process simplicity, stacked-gate memory devices have become the mainstream in the non-volatile memory market. This chapter is divided into seven sections to review the evolution of stacked-gate memory, device operation, device structures, memory array architectures, and flash memory system. In Section 51.2, a short historical review of stacked-gate memory device and the current flash device are described. Following this, the current-voltage characteristics, charge injection/ejection mechanisms, and the write/erase configurations are mentioned in detail. Based on the descriptions of device operation, some modifications in the memory device structure to improve performance are addressed in Section 51.4. Following the introductions of single memory device cells, descriptions of the memory array architectures are employed in Section 51.6 to facilitate the understanding of device operation. In Section 51.7, a table lists the history of flash memory development over the past decade. Finally, Section 51.8 is dedicated to the issues related to implementation of a flash memory system.
