Hardware Description in Verilog

This chapter presents an overview of the Verilog hardware description language (VHDL) and the way it may be used in a design environment. Many details of the language will not be discussed in this introduction. However, this chapter will cover the general concepts of Verilog that enable the reader to understand Verilog code and develop simple hardware descriptions in this language. This chapter also facilitates the learning of the full language as presented in the IEEE standards document or any of the available texts on this topic.