ABSTRACT
B5500 [Yourdon, 1972] 15 3 PDP-10 [Castillo, 1980] 10 4 Chi/05 (Univac 1108) [Lynch, Wagner, and Schwartz, 1975] 17 7 Dual 370/165 [Reynolds and Kinsberger, 1975] 9 28 SLAC 20 23 CRAY-1 [Keller, 1976] 4 190 Sun. II [Lin, 1988] 1000 720 Tandem [Grey, 1987] 16,000 5760
TABLE 7-2 Evolution of IBM maintenance strategy
Machine Era Techniques
650 Late 1950s 6 internal checkers; stand-alone diagnostics on punched cards; light and switch panels
1401 Early 1960s 20 internal checkers; stand-alone diagnostics; light and switch panels
S/360-50 Mid-1960s 75 internal checkers; OLTEP (on-line test executive program); microdiagnostics; log fault data to main memory; EREP (error recording and edit program) for outputting logged data; maintenance panel
370/168 Mod 3 Early 1970s Error-detection circuits; OLTEP; microdiagnostics for fault isolation; service processor, including trace unit (to trace up to 199 fixed and 8 movable logic points over 32 machine cycles for intermittent or environmental faults)
303X Mid-1970s Error-detection circuits; OLTS (on-line functional tests); console and processor microdiagnostics; EREP; scope loops; support processor, including trace and remote (telephone) access to log data and trace information
4341 Late 1970s Error-detection circuits; 25,000 shadow latches; support processor (error logging and environmental monitoring)
3090 Mid-1980s Error-detection circuits; error-correction circuits; recovery techniques; console and processor microdiagnostics; processor controller (duplicated for availability); fault isolation circuits; fault threshold and isolation analysis; autocall and remote access to service information and remote service console; EREP; on-line tests; reconfiguration capability; internal machine environment monitoring
DEC
IBM
THE VAX ARCHITECTURE
DANIEL P. SIEWIOREK
At the time of the inception of the VAX architecture, concerns for reliability, availability, and serviceability were gaining momentum. This case study focuses on DEC's RAMP (Reliability, Availability, and Maintainability Program) features in four different implementations of the VAX architecture. Briefly summarized in Table 7-3, these implementations are treated chronologically, by date of introduction, rather than by model number.*
The case study is divided into four sections. The first section deals with RAMP features at the VAX architectural level; that is, the level at which the attributes of the system are visible to the programmer. The next two sections describe implementations in two different generations: the first generation, composed of the VAX-11/780 and VAX-11/750, and the second generation, composed of the VAX 8600 and VAX 8700. Design, which is evolutionary in each VAX implemen tation, is built upon previous experiences. Thus, each generation has an archetypical implemen tation that not only capitalizes on experience, but also allows sharing of peripheral devices.
