ABSTRACT
The ferroelectric nonvolatile memory technology (NVFRAM) has the potential to take over a large share of the memory market, which was conservatively estimated at about 50-60 billion dollars in 1997 and is expected to possibly double by the next millenium! This raises the obvious question as to what is so unique and valuable about the NVFRAM technology? The answer is shown in the schematic diagram in Figure 1, which compares the current hierarchical architecture of a personal computer to that of a computer of the future. The hierarchical architecture provides a mechanism to interface the very fast microprocessors (CPUs) with the reasonably fast dynamic random access memories (DRAMs) (which are volatile) and finally with the slow but nonvolatile magnetic disk drives. These different sub-systems are interfaced through operating systems thus creating a significant software overhead. Consider for the moment the possibility that one could have a memory element that had all the virtues of the DRAM (i.e., fast, random access, solid state ) and the magnetic disk drives (i.e., infinite lifetime and nonvolatile). This would eliminate the entire central section of the hierarchy and would result in a physical architecture. A NVFRAM technology in principle can satisfy all these needs, with the following caveats: (i) the memory should be manufacturable; (ii) once manufactured it should be reliable; (iii) once it is reliable, it should be cost-competitive. Each of these caveats is an immense challenge by itself. Researchers worldwide are focusing on all or specific aspects of these caveats, attempting to solve them with the conviction that once all of them are solved a whole new memory technology will emerge. This then forms the backdrop for this article. We focus our attention on key materials issues that we believe will be serious impediments to the development of this technology, if they are not successfully resolved. Specifically, in this article, we focus on the high-density memory technology, shown in Figure 2, in
capacitor is in direct electrical contact with the drain of the pass-gate transistor. This immediately puts drastic materials constraints since oxidation of the poly-Si plug has to be avoided at all costs. Furthermore, Si out-diffusion and lead (or other cationic species) in-diffusion also have to be avoided. Therefore, suitable conducting barrier layers have to be used to prevent any undesirable interface chemistry. Clearly, Pt could be one such material; however it reacts with Si to form a silicide, which in turn forms a Schottky contact to Si. Therefore, designing conducting barrier layers is an important task that is currently receiving the attention of process engineers and materials scientists in many laboratories. It should be noted that the conducting barrier layer technology is of critical value not only in the FRAM technology but equally valuable in the DRAM technology.
