ABSTRACT

The ideal ferro-FET device structure would have the ferroelectric material directly on the silicon substrate. If there were an intervening oxide (low dielectric constant) layer, most of the applied voltage would be across the oxide with little across the ferroelectric (typically high dielectric constant). This would in turn make the gate voltage required to switch the ferro-FET much higher than the coercive voltage of the ferroelectric film itself. Many ferro-FET implementations also have a conducting layer, metal or polysilicon, between the oxide and the ferroelectric - forming a floating gate. Even if there were not a conducting layer between the oxide and ferroelectric film, the defects at the interface could create a “virtual” floating gate. This would be charged during programming and the charge could leak off through the ferroelectric layer during circuit operation, limiting the retention time of the memory device.