ABSTRACT
The surface preparation requirements are given by the ‘International Technol ogy Roadmap for Semiconductors’ [15] with respect to particulate, metallic and organic contamination. As the critical dimensions of the devices for future genera-
tions of technology continue to scale down, more stringent targets for wafer clean ing need to be set. The ITRS roadmap indicates that for the upcoming technology nodes, particles with sizes of only a few tens of nanometers will have to be re moved. By using the current state-of-the-art light-scattering metrology such as the KLA Tencor SP1-TBI or SP1-DLS tools there is a limitation to measure particles with a size smaller than 50 nm as individually resolved light point defects (LPDs). It has been demonstrated that this lower size-detection limit can be decreased if haze measurements are used [16]. This can be done if a high density of particles is present on the wafer surface. Using the haze method it is possible to optimise cleaning recipes for these nano-sized particles that will become critical for the de vice yield within a few years.
