Chip multiprocessor (CMP) has been used in embedded systems, thanks to the tremendous computation requirements in modern embedded processing. Increasing the integration density and achieving higher performance without corresponding increases in frequency are primary goals for microprocessor designers. However the traditional two-dimensional planar CMOS fabrication process are poor at communication latency and integration density. The threedimensional (3D) CMOS fabrication technology is one of the solutions for faster communication and more functionality on chip. Stacking two or more silicon layers in a CMP, more functional units can be implemented. Meanwhile, the vertical distance is shorter than the horizontal distance in a multi-layer chip [208, 29].