Heterogeneous embedded systems are driving an information revolution with their pervasion in our everyday lives. With the advance of the technology, embedded systems with multiple cores or VLIW-like architectures, such as multicore network processors, TI’s TMS320C6x, Philip’s TriMedia, IBM/SONY/TOSHIBA’s CELL processor, Intel’s newest 80 core processor, etc., become necessary to achieve the required high performance for the applications with growing complexity. While these parallel architectures can be exploited to increase parallelism and improve time performance, power optimization techniques are needed to minimize their power consumption. To optimize one objective is what most research has been doing, but a realistic embedded systems design requires efficient algorithms and tools that can handle multiple objectives simultaneously.