ABSTRACT
The design strategies of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) depend heavily on the system requirements. The conversion rate of the ADC is limited by the time to complete all quantization-level decisions. It varies widely from the slowest slope-type ADC that in effect resolves one quantization level at a time to the fastest flash-type ADC that resolves all levels at once. The Nyquist-rate ADC family branched out from the flash ADC. Three basic design concepts can be combined to make subranging-interpolation, folding-interpolation, subranging-folding, and even subranging-folding-interpolation to achieve certain design goals. Practical folding ADCs just rely on the zero-crossings of the folded outputs like the flash ADC. However, the DAC accuracy and the residue amplifier gain error remain as the fundamental limits in the pipelined ADC. In pipelined ADCs, the operational amplifier is just reset during the sampling phase and is used with 50% duty for residue amplification during the other phase.
