ABSTRACT
Introduction e von Neumann architecture (vN) is a design model for a stored-program digital computer that uses a processing unit and a single separate storage structure to hold both instructions and data. e general structure of a vN machine consists of: 1) a memory for storing program and data. Harvard architectures contain two parallel accessible memories for storing program and data separately; 2) a control unit (also called control path) featuring a program counter that holds the address of the next instruction to be executed; 3) an arithmetic and logic unit (also called data path) in which instructions are executed. e main advantage of the vN computing paradigm is its exibility, because it can be used to program almost all existing algorithms. However, each algorithm can be implemented on a vN computer only if it is coded according to the vN rules. With the fact that all algorithms must be sequentially programmed to run on a vN computer, many algorithms cannot be executed with their potential best perfor-mance. Algorithms that usually perform the same set of inherent parallel operations on a huge set of data are not good candidates for implementation on a vN machine. e von Neumann (gure 1) basic common model [11] lost its dominance decades ago [3], also having been criticized for being overhead-based. In industry it has been replaced by a cooperation of vN CPU and non-vN accelerators. Today, the microprocessor has become the tail wagging the dog and the basic accelerator model is data-stream-based-not instruction-stream-based. Also, since 2006, RC is also a hot spot in supercomputing, mostly FPGA-based.
