ABSTRACT
Current CPUs have small-scale parallel support for 3D mathematics computations using single-instruction-multiple-data (SIMD) computing. The processors provide 128-bit registers, each register storing four 32-bit float values. The fundamental concepts are
• to provide addition and multiplication of four numbers simultaneously (a single instruction applied to multiple data) and
• to allow shuffling, sometimes called swizzling, of the four components. Of course, such hardware has support for more than just these operations.
