ABSTRACT
One every common implementation of resistor networks is the voltage divider (see Figure 1.3.4). For this circuit, the output is always smaller than the input, in a ration which is determined by the value of R1 and R2. The current through R1 and R2 is given by:
I ¼ Vi R1 þ R2 ð1:3:12Þ
and, as Vo ¼ IR2:
Vo ¼ R2 R1 þ R2 Vi ð1:3:13Þ
1.3.1.5 Kirchoff’s laws
The circuit in Figure 1.3.5(a) contains a parallel set of resistances with two nodes indicated. A node is a point where three or more conductors are joined. Kirchoff’s first law states: The total current flowing towards a node is equal to the total current flowing away from the node, i.e. the algebraic sum of currents flowing towards a node is zero. Thus in Figure 1.3.5(b) at node B:
I1 þ I2 þ I3 ¼ I or
I1 þ I2 þ I3 I ¼ 0
In general, for any node,
SI ¼ 0 ð1:3:14Þ The circuit in Figure 1.3.6 illustrates Kirchoff’s second law, which states: The algebraic sum of the potential differences is zero, i.e.:
V ¼ V1 þ V2 þ V3 or
V1 þ V2 þ V3 V ¼ 0
Generally, for any node,
SV ¼ 0 ð1:3:15Þ
1.3.1.6 Equivalent circuits
To simplify circuit analysis, it is often necessary to reduce portions of a circuit to a simpler equivalent form. This is in order to clarify areas of the circuit that are of particular interest. The following two sections describe two theorems that enable some networks to be simplified.
