A monolithic sample-and-hold integrated circuit implemented using BI-F.E.T. technology to obtain high d.c. accuracy, fast signal acquisition and low droop rate. Input offset voltage typically 0-5 mV, acquisition time <10μs. Input characteristics do not change during hold mode. Logic inputs. T.T.L./C-MOS compatible. Supply voltage range: ±5 to ±18V. Operating temperature range: 0°C to + 70°C. T099 metal can package. High Speed Precision AD585AQ https://s3-euw1-ap-pe-df-pch-content-public-p.s3.eu-west-1.amazonaws.com/9780080928524/3f11feb5-c4b4-4085-a2b6-f2d64d3ddcee/content/fig10_2_C.jpg" xmlns:xlink="https://www.w3.org/1999/xlink"/> https://www.niso.org/standards/z39-96/ns/oasis-exchange/table">

technical specification

Supply voltage

+5, −12 to ± 18 V

Supply current

10 mA

Acquisition time (10 V step to 0-01 %)

3 µs

Aperture jitter

0-5 n.s

Droop rate (max.)

1 mV/ms

Sample to hold offset (max.)


Small signal gain bandwidth

2 MHz

Offset voltage (max.)