ABSTRACT

This chapter describes the interactive system modelling of the three-phase diode-clamped three-level inverter (DCTLI) and the ­three-phase flying-capacitor three-level inverter (FCTLI). The highest number of levels obtainable with diode-clamped and flying-capacitor multilevel inverters is limited by factors such as the number and voltage ratings of the clamping diodes and capacitors. Multilevel inverters were proposed to obtain higher output voltages ­without the use of step-up transformers closely following a sinusoidal waveform. The harmonic content in the output voltage waveform is greatly reduced in comparison with conventional two-level inverters. For a ­three-phase DCTLI or FCTLI, the number of voltage levels for the line-to-line voltage will be five and the number of gate pulses required will be twelve. Another multilevel inverter topology is the cascaded multilevel inverter. In this topology, several of the conventional single-phase four-switch H-bridge inverters are connected in cascade to obtain higher output voltage, each H-bridge inverter with a separate DC source.