ABSTRACT
This chapter discusses the challenges and potential solutions associated with first-tier calibrations performed on low-loss substrates, then the approach to design calibration kits integrated in the back-end-of-line of silicon based technology will be presented, and finally a direct de-embedding/calibration strategy, capable of setting the reference plane at the lower metal layer of a technology stack. The lines conventionally employed for probe-level TRL calibrations, are: The analysis presented in this section is based on numerical 3D EM simulations, i.e., Keysight EM Pro. When considering real structures on alumina substrate, it is expected that the lines closer to the edge of the calibration substrate will exhibit a stronger ripple caused by interference with the surface wave mode. However, significant improvement is obtained for the fused silica, where the error associated with the difference in substrate coupling due to calibration transfer is small, due to the similarity of permittivity between the fused silica, the silicon dioxide present in the back-end-of-line of the process.
