ABSTRACT

This paper presents the concept of analog time-division multiplexing of DAC output signals and introduces a frequency-domain explanatory model for both 2:1 and 4:1 analog multiplexer (AMUX) variants. Also, it presents 2:1 and 4:1 AMUX circuit concepts and related design considerations along with measurement and simulation results of a 2:1 AMUX module, realized in SiGe BiCMOS technology exhibiting an effective resolution of over 7 bit and a maximum sampling rate of 186 GS/s.