ABSTRACT
The comparator is used in numerous fields such as analog to digital converters, memories, digital communication receivers, sense amplifier in memory readout circuits and power electronics with digital control (DC-DC converter). Based on CMOS technology various comparators are designed such as the single tail current dynamic latch comparator and the double tail current dynamic latch comparator. And these comparators should have a trade-off between speeds, delay time and power consumption. As technology is scaling further there are a lot of problems related to leakage current and power consumption. The purpose of the paper is to analyse power consumption and various performance parameters of the comparator using CMOS 90nm technology with a proposed comparator and it is found that performance, power consumption and power dissipation is better in the proposed comparator.
