ABSTRACT
This chapter presents compact metal-oxide-semiconductor field-effect transistor (MOSFET) modeling approaches for process variability-aware very-large-scale-integrated (VLSI) circuit computer-aided design. The circuit design for advanced VLSI technology is severely constrained by random and systematic process variability. In the conventional variability modeling approaches, a standard set of model parameters are used for fixed corner modeling or a large number of model files are generated from ET data. The chapter describes a brief overview of the systematic and stochastic front-end process variability and sources of process variability. It discusses a methodology to characterize the random process variability that causes mismatch in the performance of identical MOSFETs in a die. The chapter summarizes conventional approaches to generate compact MOSFET variability models and discusses a detailed statistical MOSFET compact modeling approach.
